As noted in the reference application, electronic equipment, particularly modern data processing systems, use high density packaging of integrated circuits. In such systems, the need arises for continual checking of the electrical integrity of the circuits while they are operational. In fact, the purpose of the test and diagnostic means mentioned hereinbefore is to generate an error signal before a deteriorating condition within a chip causes an actual logical error to occur. Of course, catastrophic failures are also indicated by the T&D means.
In either event, the defective chips must be identified and replaced. In a high density system, the task of seeking out chip errors is a complex and time consuming task. The present invention alleviates this difficulty by interfacing with the T&D means associated with the IC chips, collecting the error signals which are supplied by such means and then storing the locations of the chips in which the errors originated. An operator is then able to quickly locate, remove and replace the defective chips.